This invention relates to an input circuit for protecting an input of an integrated circuit against electrostatic discharge (ESD) events.
Integrated circuits have been traditionally protected against ESD events by diodes which divert the energy from delicate circuit elements of the integrated circuit and deposited on the substrate. The problem with such events, however, is that they are extremely fast, and it is difficult to find protection diodes that respond fast enough and that can switch to a low enough resistance state to prevent circuit failure under ESD stress.
Many different protection systems are currently employed, but one known technique makes use of a thick field transistor, resistor, diode network and is described by Harris in the EOS/ESD Symposium Proceedings, page 220, 1987.
In the Harris device, for the case of n-substrates with p-wells, for example, for a positive ESD event at the input pin with respect of V.sub.dd, the p-well of the thick field transistor is forward biased and thus has a low resistance to the substrate. This means that ESD energy is safely dissipated to V.sub.dd.
For a negative event, the voltage rises until avalanche breakdown at the lateral collector occurs, at which point minority current flows from the collector to the base under the emitter and thereby forward biases the emitter, snapping on the lateral bipolar transistor formed by the p-well, the collector and emitter. Once turned on, the transistor safely dissipates energy to V.sub.dd. Such a device is known as a snap-back device.
Thus, while the thick field transistor is extremely robust, there is nonetheless a finite delay in it becoming turned on by the ESD impulse. As a result it cannot respond to a very fast rising edge of an ESD transient, leading to the possibility of damage to the integrated circuit components.
An input protection circuit of interest is disclosed in U.S. Pat. No. 5,237,395. This patent, which is described in relation to p-type substrates, seeks in part to address the problem that there may be a delay in the device turning on due to the need to have a high avalanche breakdown voltage in order to prevent the device from turning on during normal circuit operation. The patent discloses the use of a thin film field effect transistor, which is used in the field effect mode to discharge ESD current. However, this device must be turned on in the field effect sense by its gate, and as a result extra circuitry (the third stage) is required to sense the presence of a rapid ramp-up of the power supply. This additional circuitry makes the device more complex, when space on an integrated circuit die is at a premium. Furthermore, the sensing circuitry and field effect transistor cannot provide the fast response time associated with the thick film snap back device.